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PNI Sensor Corporation Doc #1018049 R03

SENtral Technical Data Sheet Page 13

Table 4-1: I

C Timing Parameters

Standard

Fast

Fast Plus

Units

Symbol

Parameter

Min

Max

Min

Max

Min

Max

SCL

SCL Clock

100

400

1000

kHz

SDA & SCL Rise

Time

1000

300

120

SDA & SCL Fall Time

300

20*(V

5.5V)

300

20*(V

5.5V)

120

LOW

LOW period of SCL

Clock

4.7

1.3

0.5

s

HIGH

HIGH period of SCL

Clock

4.0

0.6

0.26

s

HD;STA

Hold time (repeated)

START

4.0

0.6

0.26

s

HD;DAT

Data hold time

s

SU:DAT

Data set-up time

250

100

SU;STA

Set-Up time for

repeated Start

4.7

0.6

0.26

s

SU;STO

Stop set-up time

4.0

0.6

0.26

s

BUF

Bus free time between

STOP & START

4.7

1.3

0.5

s

4.2 I

C Host Interface (Host Bus)

The host will control SENtral on the host bus via SENtral’s I

C host interface. The host

interface consists of 2 wires: the serial clock, SCLS, and the serial data line, SDAS. Both

lines are bi-directional. SENtral is connected to the host bus via the SDAS and SCLS pins,

which incorporate open drain drivers within the device. The host bus lines must be

externally connected to a positive supply voltage (DVIO) via a pull-up resistor. See Section

4.4 for more on the pull-up resistor.

SENtral’s 7-bit I

C slave address is 0b010100x, where the most significant 6 bits of the slave

address are pre-defined in hardware and are the same for all SENtral devices. The least

significant bit is user-configurable, using the SA0 pin to set the bit to ‘0’ or ‘1’. For

example, grounding the SA0 pin (‘0’ value) results in the 7-bit address of 0b0101000. This

should be set so the SENtral slave address is unique to any other devices on the host bus.

Note that setting SA0 to ‘1’ requires utilizing microvia technology, as discussed in Section 8.

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